Life cycle assessment of silicon wafer processing for microelectronic chips and solar cells

PURPOSE: The life cycle assessment of silicon wafer processing for microelectronic chips and solar cells aims to provide current and comprehensive data. In view of the very fast market developments, for solar cell fabrication the influence of technology and capacity variations on the overall environmental impact was also investigated and the data were compared with the widely used ecoinvent data. METHODS: Existing material flow models for silicon wafer processing for microelectronic chips and solar cells used for engineering and planning formed a starting point for this analysis. The models represent an average of widely used processes and associated process equipment. The resulting input/output tables formed the data basis for the life cycle assessment. This is a cradle-to-gate investigation, consisting of primary gate-to-gate data for wafer processing. The upstream processes of the necessary inputs were supplemented with data from ecoinvent v2.0. Subsequent manufacturing steps, utilization, and waste disposal of the final products were not included. The software used for creating the inventory and impact assessment was Umberto version 5.5. The Impact 2002+ method was applied for impact assessment. RESULTS: For both semiconductor and solar cell fabrication, energy consumption and upstream chemicals production are most relevant for the overall potential environmental impact when only the gate-to-gate processes are considered. The upstream process for wafer production is dominant in solar cell fabrication, but exerts little influence on semiconductor fabrication. In the case of semiconductor fabrication, a comparison with the present ecoinvent dataset “wafer, fabricated, for integrated circuit, at plant” shows large differences. CONCLUSIONS: In the case of silicon solar cells, the results of this study and the ecoinvent data are very similar and the impact of different fabrication processes appears to be minor.