Rigorous Study on Hump Phenomena in Surrounding Channel Nanowire (SCNW) Tunnel Field-Effect Transistor (TFET)
2020
Seung-Hyun Lee | Jeong-Uk Park | Garam Kim | Dong-Woo Jee | Jang Hyun Kim | Sangwan Kim
In this paper, analysis and optimization of surrounding channel nanowire (SCNW) tunnel field-effect transistor (TFET) has been discussed with the help of technology computer-aided design (TCAD) simulation. The SCNW TFET features an ultra-thin tunnel layer at source sidewall and shows a high <span style="font-variant: small-caps;">on</span>-current (<i>I</i><sub>ON</sub>). In spite of the high electrical performance, the SCNW TFET suffers from hump effect which deteriorates subthreshold swing (<i>S</i>). In order to solve the issue, an origin of hump effect is analyzed firstly. Based on the simulation, the transfer curve in SCNW TFET is decoupled into vertical- and lateral-BTBTs. In addition, the lateral-BTBT causes the hump effect due to low turn-<span style="font-variant: small-caps;">on</span> voltage (<i>V</i><sub>ON</sub>) and low <i>I</i><sub>ON</sub>. Therefore, the device design parameter is optimized to suppress the hump effect by adjusting thickness of the ultra-thin tunnel layer. Finally, we compared the electrical properties of the planar, nanowire and SCNW TFET. As a result, the optimized SCNW TFET shows better electrical performance compared with other TFETs.
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