Alternate test of LNAs through ensemble learning of on-chip digital envelope signatures
2011
Barragán-Villarejo, Manuel | Léger, Gildas | Rueda Rueda, Adoración | Huertas Díaz, José Luis | Universidad de Sevilla. Departamento de Ingeniería Eléctrica | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | Gobierno de España | Junta de Andalucía
This paper presents a novel and low-cost methodology for testing embedded Low Noise Amplifiers (LNAs). It is based on the detection and analysis of the response envelope of the Device Under Test (DUT) to a two-tone input signal. The envelope signal is processed to obtain a digital signature sensitive to key specifications of the DUT. An optimized regression model based on ensemble learning is used to relate the digital signatures to the target specifications. A new Figure of Merit (FOM) is proposed to evaluate the prediction accuracy of the statistical model, and a demonstrator has been developed to prove the feasibility of the approach. This demonstrator features a 2.445 GHz low-power LNA and a simple envelope detector, and has been developed in a 90 nm CMOS technology. Post-layout simulations are provided to verify the functionality of the proposed test technique.
显示更多 [+] 显示较少 [-]Gobierno de España TEC2007-68072/MIC, TSI-020400-2008-71/MEDEA+2A105, CATRENE CT302
显示更多 [+] 显示较少 [-]Junta de Andalucia P09-TIC-5386
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