Metal-Insulator-Metal Single Electron Transistors with Tunnel Barriers Prepared by Atomic Layer Deposition
2017
Golnaz Karbasian | Michael S. McConnell | Hubert George | Louisa C. Schneider | Matthew J. Filmer | Alexei O. Orlov | Alexei N. Nazarov | Gregory L. Snider
Single electron transistors are nanoscale electron devices that require thin, high-quality tunnel barriers to operate and have potential applications in sensing, metrology and beyond-CMOS computing schemes. Given that atomic layer deposition is used to form CMOS gate stacks with low trap densities and excellent thickness control, it is well-suited as a technique to form a variety of tunnel barriers. This work is a review of our recent research on atomic layer deposition and post-fabrication treatments to fabricate metallic single electron transistors with a variety of metals and dielectrics.
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